DeLoach, Juanita Ph.D.

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Updated 03/30/10

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Jones Day

2727 North Harwood Street

Dallas, TX 75201-1515

Phone: 1.214.969.4853 (Business Phone)

Fax: 1.214.969.5100 (Business Fax)

Contact Us (Business Email)

Websites associated with this firm:http://www.jonesday.com

Summary

Current Employment Position(s)

IP Legal Intern

Lawyer Overview

Juanita's areas of practice include litigation support and the preparation of noninfringement and invalidity opinions.

Prior to joining Jones Day, Juanita worked as a process engineer at Texas Instruments in silicon technology and development. She began her career as a plasma etch engineer working on shallow trench isolation. She also spent several years working as a thin films engineer developing high stress nitrides and nickel silicide for C027 and C014 technology nodes. She holds shallow trench and silicide patents from her work at Texas Instruments. Her background also includes research in VLSI design with an emphasis on digital logic and implementation of Boolean functions and deposition of titania and titania-zirconia multilayer thin films deposited by reactive sputter deposition using oxygen and argon plasmas. Juanita interned at Texas Instruments and Motorola during graduate school. She is the recipient of the National Society of Engineers Distinguished Fellow Award, the Dupont Academic Excellence Award, and the American Vacuum Society Graduate Research Award.

Juanita is a member of the National Society of Black Engineers, the Black Law Students Association, and the State Bar of Texas, Law Student Division.

Areas of Practice

  • Intellectual Property

Representative Cases

  • Menasha and Leverage Point defend against patent infringement claims relating to a system for generating advertising while dispensing pharmaceutical products , (2009)
  • Sercel defends against patent infringement suit involving its seismic data acquisition equipment , (2009)

West Practice Categories

Copyrights, Intellectual Property Law, International Intellectual Property, Patents, Technology Licensing, Trade Dress, Trade Secrets, Trademarks

Qualifications

Education

  • Mercer University
  • Southern Methodist University
  • U of Wisconsin - Milwaukee

Articles

Published Works

  • Nickel Silicide Formation for Semiconductor Components, 20090079010, 2009
  • Process method to fabricate cmos circuits with dual stress contact etch-stop liner layers, 20090020791, 2008
  • Method for forming a metal silicide, 20090004853, 2008
  • Method of manufacturing metal silicide contacts, 20080230846, 2008
  • Method for manufacturing a semiconductor device containing metal silicide regions, 7,422,967, 2008
  • In-situ hardmask pullback using an in-situ plasma resist trim process, 7,320,927, 2008
  • Best in class cost to performance and high density, low operating power 45 nm technology, coauthor, VLSI, 2007
  • Nickel SALICIDE Process Technology for CMOS Devices of 90nm Node and Beyond, coauthor, Junction Technology, 2006. IWJT '06 International Workshop, 127-33, 2006
  • Forming a trench to define one or more isolation regions in a semiconductor structure, 6,905,943, 2005
  • An Enhanced 90nm High Performance Technology with Strong Performance Improvements from Stress and Mobility Increase through Simple Process Changes, coauthor, IEEE 2004 Symposium on VLSI Technology Digest of Technical Papers, 162-3, 2004
  • Dielectric Function of thin-film titanium oxide with a granular nanostructure, coauthor, J. Vac. Sci. Technol. B 22(6), 2658-2662, 2004
  • Method for moat nitride pull back for shallow trench isolation, 6,818,526, 2004
  • A High Performance 90 nm Logic Technology with a 37nm Gate Length, Dual Plasma Nitrided Gate Dielectrics and Differential Offset Spacer, coauthor, IEEE 2003 Symposium on VLSI Technology Digest of Technical Papers, 2003
  • Optical Absorption Behavior of ZrO2-TiO2 Nanolaminate Films, coauthor, J. Appl. Phys.94, 654-663, 2003
  • (Zr,Ti)O2 Interface Structure in ZrO2-Ti-O2 Nanolaminates with Ultrathin Periodicity, coauthor, Appl. Phys. Lett. 81, 238-240, 2002
  • 60 nm Gate Length Dual-Vt CMOS for High Speed Performance Applications, coauthor, IEEE 2002 Symposium on VLSI Technology Digest of Technical Papers, 124, 2002
  • Growth-Controlled Cubic Zirconia Microstructure in Zirconia-Titania Nanolaminates, coauthor, J. Vac. Sci. Technol. A 20, 1517-1524, 2002
  • Phase Development in Annealed Zirconia-Titania Nanolaminates, coauthor, J. Vac. Sci. Technol. A 18, 2922-2927, 2000
  • High Refractive Index -Textured Nanocrystalline Cubic Zirconia Formed Using Titania Interruption Layers, coauthor, J. Mat. Sci. Lett. 19, 1123-1125, 2000
  • Correlation Between Titania Film Structure and Near Ultraviolet Optical Absorption, coauthor, J. Appl. Phys. 85, 2377-2384, 1999
  • A Study of Thin Film Titania and Titania-Zirconia Multilayer Nanolaminates Deposited by Reactive Sputter Deposition in Oxygen and Argon-Oxygen Plasmas, Ph.D. Dissertation, University of Wisconsin-Milwaukee, 1999
  • Thickness-Dependent Crystallinity of Sputter Deposited Titania, coauthor, J. Vac. Sci. Technol. A 16, 1963-1968, 1998
  • Deposition and Selective Etching of PSG and PeTEOS Films for Corrugated Cylinder and Crown Capacitors, coauthor, Texas Instruments, Inc.,Technical Activity Report (Internal Document), 1996
  • Symmetrical Circuit Modules for Implementing Boolean Functions, MS Thesis, University of Wisconsin-Milwaukee, 1994

Office Information

Address

2727 North Harwood Street
Dallas, TX 75201-1515

Phones

1.214.969.4853 (Business Phone)

Faxes

1.214.969.5100 (Business Fax)

Emails

Contact Us (Business Email)

Websites

http://www.jonesday.com

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